FPGA Technology Mapping Using Sketch-Guided Program Synthesis

Author:

Smith Gus Henry1ORCID,Kushigian Benjamin1ORCID,Canumalla Vishal2ORCID,Cheung Andrew2ORCID,Lyubomirsky Steven3ORCID,Porncharoenwase Sorawee1ORCID,Just René1ORCID,Bernstein Gilbert Louis2ORCID,Tatlock Zachary1ORCID

Affiliation:

1. University of Washington, Seattle, United States of America

2. University of Washington, Seattle, USA

3. OctoAI, Seattle, USA

Publisher

ACM

Reference50 articles.

1. Can not correctly infer "A*B+C" to DSP48E2. https://support.xilinx.com/s/question/0D54U00006AqPXFSA3/can-not-correctly-infer-abc-to-dsp48e2?language=en_US. Accessed: 2023-12-07.

2. DSP48E2 inference for convolution/multiplication of 8-bit operands. https://support.xilinx.com/s/question/0D52E00006hpnGVSAY/dsp48e2-inference-for-convolutionmultiplication-of-8bit-operands?language=en_US. Accessed: 2023-12-07.

3. Eia-is-103 : Library of parameterized modules (lpm).

4. Inferring SIMD accumulator with Xilinx DSP48e2. https://old.reddit.com/r/FPGA/comments/tr9vzn/inferring_simd_accumulator_with_xilinx_dsp48e2/. Accessed: 2023-12-07.

5. The simple theorem prover.

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