A distributed timing synchronization technique for parallel multi-core instruction-set simulation

Author:

Wu Meng-Huan1,Fu Cheng-Yang1,Wang Peng-Chih1,Tsay Ren-Song1

Affiliation:

1. National Tsing Hua University, Taiwan

Abstract

As multi-core architecture has become the mainstream, the corresponding multi-core instruction-set simulation (MCISS) is also needed to aid system development. Ideally, we may run a MCISS in parallel to enhance the simulation speed. However, the conventional centralized timing synchronization mechanism would greatly constrain the parallelism of a MCISS, so the simulation speed is bounded. To resolve this issue, we propose a new distributed timing synchronization technique which allows higher parallelism for a MCISS. Hence, it accelerates the simulation speed by 9 to 20 times as the number of cores increases in contrast to the centralized synchronization approach.

Funder

National Science Council Taiwan

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Software

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