Affiliation:
1. Tampere University of Technology, Tampere, Finland
Abstract
In the near future, GPUs are expected to have hardware support for real-time ray tracing in order to, e.g., help render complex lighting effects in video games and enable photorealistic augmented reality. One challenge in real-time ray tracing is dynamic scene support, that is, rebuilding or updating the spatial data structures used to accelerate rendering whenever the scene geometry changes. This paper proposes PLOCTree, an accelerator for tree construction based on the Parallel Locally-Ordered Clustering (PLOC) algorithm. Tree construction is highly memory-intensive, thus for the hardware implementation, the algorithm is rewritten into a bandwidth-economical form which converts most of the external memory traffic of the original software-based GPU implementation into streaming on-chip data traffic. As a result, the proposed unit is 3.9 times faster and uses 7.7 times less memory bandwidth than the GPU implementation. Compared to state-of-the-art hardware builders, PLOCTree gives a superior performance-quality tradeoff: it is nearly as fast as a state-of-the-art low-quality linear builder, while producing trees of similar Surface Area Heuristic (SAH) cost as a comparatively expensive binned SAH sweep builder.
Funder
Business Finland
HSA Foundation
Tampere University of Technology Graduate School
Academy of Finland
Publisher
Association for Computing Machinery (ACM)
Subject
General Arts and Humanities
Cited by
10 articles.
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1. H-PLOC: Hierarchical Parallel Locally-Ordered Clustering for Bounding Volume Hierarchy Construction;Proceedings of the ACM on Computer Graphics and Interactive Techniques;2024-08-09
2. QuickTree: A Fast Hardware BVH Construction Engine;Proceedings of the 21st ACM International Conference on Computing Frontiers;2024-05-07
3. Building Oriented Bounding Boxes by the intermediate use of ODOPs;Computers & Graphics;2023-11
4. PLOC++;Proceedings of the ACM on Computer Graphics and Interactive Techniques;2022-07-25
5. Agglomerative Memory and Thread Scheduling for High-Performance Ray-Tracing on GPUs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-02