High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS

Author:

Du Yixiao1,Hu Yuwei1,Zhou Zhongchun2,Zhang Zhiru1

Affiliation:

1. Cornell University, Ithaca, NY, USA

2. Tsinghua University, Beijing, China

Funder

CRISP

Publisher

ACM

Reference36 articles.

1. Accelerating SpMV on FPGAs by Compressing Nonzero Values

2. Mathematical foundations of the GraphBLAS

3. Trevor Gale , Erich Elsen , and Sara Hooker . The state of sparsity in deep neural networks. arXiv preprint arXiv:1902.09574 , 2019 . Trevor Gale, Erich Elsen, and Sara Hooker. The state of sparsity in deep neural networks. arXiv preprint arXiv:1902.09574, 2019.

4. Yi-Hsiang Lai , Ecenur Ustun , Shaojie Xiang , Zhenman Fang , Hongbo Rong , and Zhiru Zhang . Programming and synthesis for software-defined FPGA acceleration: status and future prospects. ACM Trans. on Reconfigurable Technology and Systems , 2021 . Yi-Hsiang Lai, Ecenur Ustun, Shaojie Xiang, Zhenman Fang, Hongbo Rong, and Zhiru Zhang. Programming and synthesis for software-defined FPGA acceleration: status and future prospects. ACM Trans. on Reconfigurable Technology and Systems, 2021.

5. A High Memory Bandwidth FPGA Accelerator for Sparse Matrix-Vector Multiplication

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