Chain-of-Descriptions: Improving Code LLMs for VHDL Code Generation and Summarization

Author:

Vijayaraghavan Prashanth1ORCID,Nitsure Apoorva1ORCID,Mackin Charles1ORCID,Shi Luyao1ORCID,Ambrogio Stefano1ORCID,Haran Arvind2ORCID,Paruthi Viresh2ORCID,Elzein Ali2ORCID,Coops Dan2ORCID,Beymer David1ORCID,Baldwin Tyler1ORCID,Degan Ehsan1ORCID

Affiliation:

1. IBM Research, San Jose, CA, USA

2. IBM, Austin, TX, USA

Publisher

ACM

Reference23 articles.

1. Josh Achiam, Steven Adler, Sandhini Agarwal, Lama Ahmad, Ilge Akkaya, Florencia Leoni Aleman, Diogo Almeida, Janko Altenschmidt, Sam Altman, Shyamal Anadkat, et al. 2023. Gpt-4 technical report. arXiv preprint arXiv:2303.08774 (2023).

2. Anonymous. 2024. VHDL-Eval: A Framework for Evaluating Large Language Models in VHDL Code Generation. In Press. Proceedings of the First IEEE International Workshop on LLM-Aided Design (2024).

3. Scalable Sequential Equivalence Checking across Arbitrary Design Transformations

4. Comparison and Evaluation of Clone Detection Tools

5. Chip-Chat: Challenges and Opportunities in Conversational Hardware Design

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