LASP: LLM Assisted Security Property Generation for SoC Verification

Author:

Ayalasomayajula Avinash1ORCID,Guo Rui1ORCID,Zhou Jingbo1ORCID,Saha Sujan Kumar1ORCID,Farahmandi Farimah1ORCID

Affiliation:

1. University of Florida, Gainesville, Florida, USA

Publisher

ACM

Reference25 articles.

1. Mohammad Akyash and Hadi Mardani Kamali. 2024. Evolutionary Large Language Models for Hardware Security: A Comparative Survey. arXiv:2404.16651 [cs.CR]

2. Automatic Asset Identification for Assertion-Based SoC Security Verification

3. Fault Injection Attacks on Cryptographic Devices: Theory, Practice, and Countermeasures

4. Cadence. [n. d.]. Z01X Functional Safety Assurance. https://www.synopsys.com/verification/simulation/z01x-functional-safety.html Accessed: 2023-05-23.

5. Wenji Fang Mengming Li Min Li Zhiyuan Yan Shang Liu Hongce Zhang and Zhiyao Xie. 2024. AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs. arXiv:2402.00386 [cs.AR]

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