Partitioning Models for Scaling Parallel Sparse Matrix-Matrix Multiplication

Author:

Akbudak Kadir1,Selvitopi Oguz1,Aykanat Cevdet1

Affiliation:

1. Bilkent University, Ankara, Turkey

Abstract

We investigate outer-product--parallel, inner-product--parallel, and row-by-row-product--parallel formulations of sparse matrix-matrix multiplication (SpGEMM) on distributed memory architectures. For each of these three formulations, we propose a hypergraph model and a bipartite graph model for distributing SpGEMM computations based on one-dimensional (1D) partitioning of input matrices. We also propose a communication hypergraph model for each formulation for distributing communication operations. The computational graph and hypergraph models adopted in the first phase aim at minimizing the total message volume and balancing the computational loads of processors, whereas the communication hypergraph models adopted in the second phase aim at minimizing the total message count and balancing the message volume loads of processors. That is, the computational partitioning models reduce the bandwidth cost and the communication hypergraph models reduce the latency cost. Our extensive parallel experiments on up to 2048 processors for a wide range of realistic SpGEMM instances show that although the outer-product--parallel formulation scales better, the row-by-row-product--parallel formulation is more viable due to its significantly lower partitioning overhead and competitive scalability. For computational partitioning models, our experimental findings indicate that the proposed bipartite graph models are attractive alternatives to their hypergraph counterparts because of their lower partitioning overhead. Finally, we show that by reducing the latency cost besides the bandwidth cost through using the communication hypergraph models, the parallel SpGEMM time can be further improved up to 32%.

Funder

the Scientific and Technological Research Council of Turkey

European Cooperation in Science and Technology

Publisher

Association for Computing Machinery (ACM)

Subject

Computational Theory and Mathematics,Computer Science Applications,Hardware and Architecture,Modelling and Simulation,Software

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1. HARP: Hardware-Based Pseudo-Tiling for Sparse Matrix Multiplication Accelerator;56th Annual IEEE/ACM International Symposium on Microarchitecture;2023-10-28

2. Efficient Execution of SpGEMM on Long Vector Architectures;Proceedings of the 32nd International Symposium on High-Performance Parallel and Distributed Computing;2023-08-07

3. A Systematic Survey of General Sparse Matrix-matrix Multiplication;ACM Computing Surveys;2023-03-02

4. Simultaneous Computational and Data Load Balancing in Distributed-Memory Setting;SIAM Journal on Scientific Computing;2022-11-15

5. Squaring the circle;Proceedings of the International Conference on Parallel Architectures and Compilation Techniques;2022-10-08

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