Survey of Approaches and Techniques for Security Verification of Computer Systems

Author:

Erata Ferhat1ORCID,Deng Shuwen1ORCID,Zaghloul Faisal1ORCID,Xiong Wenjie2ORCID,Demir Onur3ORCID,Szefer Jakub1ORCID

Affiliation:

1. Yale University, New Haven, CT, USA

2. Virginia Tech, Blacksburg, VA, USA

3. Yeditepe Üniversitesi, Istanbul, Turkey

Abstract

This article surveys the landscape of security verification approaches and techniques for computer systems at various levels: from a software-application level all the way to the physical hardware level. Different existing projects are compared, based on the tools used and security aspects being examined. Since many systems require both hardware and software components to work together to provide the system’s promised security protections, it is not sufficient to verify just the software levels or just the hardware levels in a mutually exclusive fashion. This survey especially highlights system levels that are verified by the different existing projects and presents to the readers the state of the art in hardware and software system security verification. Few approaches come close to providing full-system verification, and there is still much room for improvement.

Funder

National Science Foundation

Semiconductor Research Corporation

Google PhD Fellowship

TUBITAK

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

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