Harnessing Multiple BMC Engines together for Efficient Formal Verification-Reference-Cited by-同舟云学术

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Harnessing Multiple BMC Engines together for Efficient Formal Verification

Published:2023-09-21 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 21st ACM-IEEE International Conference on Formal Methods and Models for System Design
language:
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Author:

Ghosh Devleena¹^ORCID,Ghosh Sumana¹^ORCID,Gajavelly Raj Kumar²^ORCID,Banerjee Ansuman¹^ORCID

Affiliation:

1. Indian Statistical Institute, Kolkata, India

2. IBM Systems, Bangalore, India

Funder

Semiconductor Research Corporation SRC

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3610579.3611083

Reference25 articles.

1. 2015. Hardware Model Checking Competition 2015 (HWMCC'15). https://fmv.jku.at/hwmcc15/ 2015. Hardware Model Checking Competition 2015 (HWMCC'15). https://fmv.jku.at/hwmcc15/

2. 2017. Hardware Model Checking Competition 2017 (HWMCC'17). https://fmv.jku.at/hwmcc17/ 2017. Hardware Model Checking Competition 2017 (HWMCC'17). https://fmv.jku.at/hwmcc17/

3. Gilles Audemard and Laurent Simon . 2009. Glucose: a solver that predicts learnt clauses quality. SAT Competition ( 2009 ), 7--8. Gilles Audemard and Laurent Simon. 2009. Glucose: a solver that predicts learnt clauses quality. SAT Competition (2009), 7--8.

4. SIAM journal on computing 32, 1;Auer Peter,2002

5. Construction of Verifier Combinations Based on Off-the-Shelf Verifiers

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