Flexible Reconfigurable On-chip Networks for Multi-core SoCs
Author:
Affiliation:
1. Electrical and Computer Engineering, Ryerson University, Toronto ON
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3241793.3241813
Reference9 articles.
1. On-the-Field Test and Configuration Infrastructure for 2-D-Mesh NoCs in Shared-Memory Many-Core Architectures
2. Efficient Dynamic Virtual Channel Organization and Architecture for NoC Systems
3. Application-Aware Topology Reconfiguration for On-Chip Networks
4. Sarbazi-Azad H. and Zomaya A. Y. 2013. A reconfigurable on-chip interconnection network for large multicore systems. In Large Scale Network-Centric Distributed Systems H. Sarbazi-Azad and A. Y. Zomaya Eds. Wiley-IEEE Press. Sarbazi-Azad H. and Zomaya A. Y. 2013. A reconfigurable on-chip interconnection network for large multicore systems. In Large Scale Network-Centric Distributed Systems H. Sarbazi-Azad and A. Y. Zomaya Eds. Wiley-IEEE Press.
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