1. Ditching the Queue: Optimizing Coprocessor Utilization with Out-of-Order CPUs on Compact Systems on Chip;Electronics;2024-07-31
2. Effective Context-Sensitive Memory Dependence Prediction;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02
3. Exploring Instruction Fusion Opportunities in General Purpose Processors;2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO);2022-10
4. Reducing Load Latency with Cache Level Prediction;2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2022-04
5. Fat Loads: Exploiting Locality Amongst Contemporaneous Load Operations to Optimize Cache Accesses;MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture;2021-10-17