SCORE

Author:

Zhou You1,Wu Fei1,Lu Zhonghai2ORCID,He Xubin3,Huang Ping3,Xie Changsheng1

Affiliation:

1. Huazhong University of Science and Technology, China

2. KTH Royal Institute of Technology, Stockholm, Sweden

3. Temple University, Philadelphia, PA, USA

Abstract

Technology scaling and program/erase cycling result in an increasing bit error rate in NAND flash storage. Some solid state drives (SSDs) adopt overlong error correction codes (ECCs) , whose redundancy size exceeds the spare area limit of flash pages, to protect user data for improved reliability and lifetime. However, the read performance is significantly degraded, because a logical data page and its ECC redundancy are stored in two flash pages. In this article, we find that caching ECCs has a large potential to reduce flash reads by achieving higher hit rates, compared to caching data. Then, we propose a novel <underline>s</underline>cheme to efficiently <underline>c</underline>ache <underline>o</underline>ve<underline>r</underline>long <underline>E</underline>CCs, called SCORE , to improve the SSD performance. Exceeding ECC redundancy (called ECC residues ) of logically consecutive data pages are grouped into ECC pages . SCORE partitions RAM to cache both data pages and ECC pages in a workload-adaptive manner. Finally, we verify SCORE using extensive trace-driven simulations. The results show that SCORE obtains high ECC hit rates without sacrificing data hit rates, thus improving the read performance by an average of 22% under various workloads, compared to the state-of-the-art schemes.

Funder

U.S. National Science Foundation

Fundamental Research Funds for the Central Universities

Shenzhen Basic Research Project

Wuhan Science and Technology Project

National Natural Science Foundation of China

111 Project

Key Laboratory of Data Storage System, Ministry of Education

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Information Systems,Software

Reference80 articles.

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