SCA Secure and Updatable Crypto Engines for FPGA SoC Bitstream Decryption-Reference-Cited by-同舟云学术

SCA Secure and Updatable Crypto Engines for FPGA SoC Bitstream Decryption

Published:2019 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 3rd ACM Workshop on Attacks and Solutions in Hardware Security Workshop - ASHES'19
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Author:

Unterstein Florian¹,Jacob Nisha¹,Hanley Neil²,Gu Chongyan²,Heyszl Johann¹

Affiliation:

1. Fraunhofer Institute for Applied and Integrated Security AISEC, Munich, Germany

2. Centre for Secure Information Technologies (CSIT), ECIT, Queen's University Belfast, Belfast, United Kingdom

Funder

Engineering and Physical Sciences Research Council

German Federal Ministry of Education and Research

Publisher

ACM Press

Reference37 articles.

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3. Georg T. Becker and Raghavan Kumar. 2014. Active and Passive Side-Channel Attacks on Delay Based PUF Designs. IACR Cryptology ePrint Archive, Vol. 2014 (2014), 287. https://eprint.iacr.org/2014/287

4. Jean-Luc Danger, Sylvain Guilley, P Nguyen, and Olivier Rioul. 2016. PUFs: Standardization and Evaluation. In 2016 Mobile System Technologies Workshop (MST). 12--18. https://doi.org/10.1109/MST.2016.11

5. Blaise Gassend, Dwaine E. Clarke, Marten van Dijk, and Srinivas Devadas. 2002. Silicon physical random functions. In Proceedings of the 9th ACM Conference on Computer and Communications Security - CCS 2002, Washington, DC, USA, November 18-22, 2002, Vijayalakshmi Atluri (Ed.). ACM, 148--160. https://doi.org/10.1145/586110.586132