Energy management for real-time embedded applications with compiler support

Author:

AbouGhazaleh Nevine1,Childers Bruce1,Mosse Daniel1,Melhem Rami1,Craven Matthew1

Affiliation:

1. University of Pittsburgh, Pittsburgh, PA

Abstract

Reducing device energy has become one of the most important challenges to embedded systems designers. Processors with dynamic voltage scaling permit trading performance for reduced energy consumption as a program executes. In this paper, we first present a novel hybrid scheme that uses dynamic voltage scaling to adjust the performance of embedded applications to reduce energy consumption while also meeting time constraints. Our fine grained approach uses the compiler to insert power management hints in the application code. These hints convey path specific run-time information about the program's progress to power management points invoked by the operating system that adjust processor performance. Second we present an algorithm for inserting power management hints along different program paths. Finally, we experimentally evaluate our approach and show that signi cant energy reduction can be achieved. On two embedded applications, MPEG movie decoding and automatic target recognition, our scheme reduces energy by up to 79% over no power management and by up to over 50% static power management. We also experimentally demonstrate that our scheme achieves more energy savings compared to two purely compiler directed schemes.

Publisher

Association for Computing Machinery (ACM)

Subject

Computer Graphics and Computer-Aided Design,Software

Reference22 articles.

1. AbouGhazaleh N Childers B Mosse D Melhem R Craven M. Collaborative Compiler-OS Power Management for time-sensitive applications. TR-02-103 2002. http://www.cs.pitt.edu/PARTS/compiler-directed. AbouGhazaleh N Childers B Mosse D Melhem R Craven M. Collaborative Compiler-OS Power Management for time-sensitive applications. TR-02-103 2002. http://www.cs.pitt.edu/PARTS/compiler-directed.

2. Azevedo A Issenin I Cornea R Gupta R Dutt N Veidenbaum A Nicolau A. Profile-based dynamic voltage scheduling using program checkpoints. Design automation and test in Europe. 2002. Azevedo A Issenin I Cornea R Gupta R Dutt N Veidenbaum A Nicolau A. Profile-based dynamic voltage scheduling using program checkpoints. Design automation and test in Europe. 2002.

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Power efficient rate monotonic scheduling for multi-core systems;Journal of Parallel and Distributed Computing;2012-01

2. A Neural Network Approach to Dynamic Frequency Scaling;15th International Conference on Advanced Computing and Communications (ADCOM 2007);2007-12

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