Challenges in Large FPGA-based Logic Emulation Systems-Reference-Cited by-同舟云学术

Challenges in Large FPGA-based Logic Emulation Systems

Published:2018-03-25 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2018 International Symposium on Physical Design
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Author:

Hung William N.N.¹,Sun Richard¹

Affiliation:

1. Synopsys, Mountain View, CA, USA

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3177540.3177542

Reference13 articles.

1. Accellera. 2016. Standard Co-Emulation Modeling Interface (SCE-MI) Reference Manual (bibinfoedition2.4 ed.). Accellera. 2016. Standard Co-Emulation Modeling Interface (SCE-MI) Reference Manual (bibinfoedition2.4 ed.).

2. Logic emulation with virtual wires

3. Dinesh Baviskar and Dinesh Baviskar. 2009. A pipelined simulation approach for logic emulation using multi-FPGA platforms Proceedings of the IEEE International Symposium on Circuits and Systems. 1141 -- 1144. Dinesh Baviskar and Dinesh Baviskar. 2009. A pipelined simulation approach for logic emulation using multi-FPGA platforms Proceedings of the IEEE International Symposium on Circuits and Systems. 1141 -- 1144.

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