Pin Assignment Optimization for Multi-2.5D FPGA-based Systems

Author:

Kuo Wan-Sin1,Zhang Shi-Han1,Mak Wai-Kei1,Sun Richard2,Leow Yoon Kah2

Affiliation:

1. National Tsing Hua University, Hsinchu, Taiwan Roc

2. Synopsys, Inc., Mountain View, USA

Funder

MOST

Publisher

ACM

Reference13 articles.

1. The roles of FPGAs in reprogrammable systems

2. S. Hauck. Multi-FPGA Systems. Ph.D. dissertation University of Washington Seattle WA USA 1995. S. Hauck. Multi-FPGA Systems. Ph.D. dissertation University of Washington Seattle WA USA 1995.

3. J. Babb R. Tessier M. Dahl S. Hanono D. Hoki and A. Agarwal. Logic emulation with virtual wires. IEEE transactions on computer-aided design of integrated circuits and systems 16(6):609--626 1997. 10.1109/43.640619 J. Babb R. Tessier M. Dahl S. Hanono D. Hoki and A. Agarwal. Logic emulation with virtual wires. IEEE transactions on computer-aided design of integrated circuits and systems 16(6):609--626 1997. 10.1109/43.640619

4. ZeBu server-3. Synopsys. https://www.synopsys.com/verification/emulation/zebu-server.html. ZeBu server-3. Synopsys. https://www.synopsys.com/verification/emulation/zebu-server.html.

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1. Analytical Placement with 3D Poisson’s Equation and ADMM-based Optimization for Large-scale 2.5D Heterogeneous FPGAs;ACM Transactions on Design Automation of Electronic Systems;2023-09-08

2. LEAPS: Topological-Layout-Adaptable Multi-Die FPGA Placement for Super Long Line Minimization;IEEE Transactions on Circuits and Systems I: Regular Papers;2023

3. Performance-Driven Simultaneous Partitioning and Routing for Multi-FPGA Systems;2021 58th ACM/IEEE Design Automation Conference (DAC);2021-12-05

4. TopoPart: a Multi-level Topology-Driven Partitioning Framework for Multi-FPGA Systems;2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD);2021-11-01

5. Pin Assignment Optimization for Multi-2.5D FPGA-Based Systems With Time-Multiplexed I/Os;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021-03

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