1. Analog IC Sizing Background;Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies;2020
2. Introduction;Analog Integrated Circuit Design Automation;2016-07-21
3. Analog Circuit and Layout Synthesis Revisited;Proceedings of the 2015 Symposium on International Symposium on Physical Design;2015-03-29
4. Enhancing an Automatic Analog IC Design Flow by Using a Technology-Independent Module Generator;Advances in Computer and Electrical Engineering;2015
5. Floorplan-aware analog IC sizing and optimization based on topological constraints;Integration;2015-01