A Survey on Assertion-based Hardware Verification

Author:

Witharana Hasini1ORCID,Lyu Yangdi2ORCID,Charles Subodha3ORCID,Mishra Prabhat1ORCID

Affiliation:

1. University of Florida, Gainesville, Florida, USA

2. Hong Kong University of Science and Technology, Guangzhou, Guangdong, China

3. University of Moratuwa, Moratuwa, Sri Lanka

Abstract

Hardware verification of modern electronic systems has been identified as a major bottleneck due to the increasing complexity and time-to-market constraints. One of the major objectives in hardware verification is to drastically reduce the validation and debug time without sacrificing the design quality. Assertion-based verification is a promising avenue for efficient hardware validation and debug. In this article, we provide a comprehensive survey of recent progress in assertion-based hardware verification. Specifically, we outline how to define assertions using temporal logic to specify expected behaviors in different abstraction levels. Next, we describe state-of-the art approaches for automated generation of assertions. We also discuss test generation techniques for activating assertions to ensure that the generated assertions are valid. Finally, we present both pre-silicon and post-silicon assertion-based validation approaches that utilize simulation, formal methods as well as hybrid techniques. We conclude with a discussion on utilizing assertions for verifying both functional and non-functional requirements.

Funder

National Science Foundation

Semiconductor Research Corporation

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science,Theoretical Computer Science

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