Affiliation:
1. UCLA Computer Science Department, Los Angeles, CA, USA
Abstract
Consumer electronics today such as cell phones often have one or more low-power FPGAs to assist with energyintensive operations in order to reduce overall energy consumption and increase battery life. However, current techniques for programming FPGAs require people to be specially trained to do so. Ideally, software engineers can more readily take advantage of the benefits FPGAs offer by being able to program them using their existing skills, a common one being object-oriented programming. However, traditional techniques for compiling object-oriented languages are at odds with today's FPGA tools, which support neither pointers nor complex data structures. Open until now is the problem of compiling an object-oriented language to an FPGA in a way that harnesses this potential for huge energy savings. In this paper, we present a new compilation technique that feeds into an existing FPGA tool chain and produces FPGAs with up to almost an order of magnitude in energy savings compared to a low-power microprocessor while still retaining comparable performance and area usage.
Publisher
Association for Computing Machinery (ACM)
Subject
Computer Graphics and Computer-Aided Design,Software
Cited by
2 articles.
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1. MLIR: Scaling Compiler Infrastructure for Domain Specific Computation;2021 IEEE/ACM International Symposium on Code Generation and Optimization (CGO);2021-02-27
2. Towards compilation of an imperative language for FPGAs;Proceedings of the 10th ACM SIGPLAN International Workshop on Virtual Machines and Intermediate Languages;2018-11-04