High performance stencil code generation with Lift-Reference-Cited by-同舟云学术

High performance stencil code generation with Lift

Published:2018 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2018 International Symposium on Code Generation and Optimization - CGO 2018
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Author:

Hagedorn Bastian¹,Stoltzfus Larisa²,Steuwer Michel³,Gorlatch Sergei¹,Dubach Christophe²

Affiliation:

1. University of Münster, Germany

2. University of Edinburgh, UK

3. University of Glasgow, UK

Funder

EPSRC

Publisher

ACM Press

Reference52 articles.

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2. Krste Asanovic, Ras Bodik, Bryan Christopher Catanzaro, Joseph James Gebis, Parry Husbands, Kurt Keutzer, David A Patterson, William Lester Plishker, John Shalf, Samuel Webb Williams, et al. 2006. The Landscape Of Parallel Computing Research: A View From Berkeley . Technical Report. UCB/EECS-2006-183, EECS Department, University of California, Berkeley.

3. Olivier Aumage, Denis Barthou, and Alexandre Honorat. 2016. A Stencil DSEL For Single Code Accelerated Computing With SYCL. In SYCL 2016 (Workshop) at ACM SIGPLAN PPoPP .

4. Peter Bastian, Markus Blatt, Christian Engwer, Andreas Dedner, Robert Klöfkorn, S Kuttanikkad, Mario Ohlberger, and Oliver Sander. 2006. The Distributed And Unified Numerics Environment (DUNE). In Proc. Of The 19th Symposium On Simulation Technique In Hannover .

5. Tobias Brandvik and Graham Pullan. 2010. SBLOCK: A Framework For Efficient Stencil-Based PDE Solvers On Multi-Core Platforms. In CIT 2010 . IEEE, 1181–1188.

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