Analog/Mixed-Signal Layout Optimization using Optimal Well Taps

Author:

S Ramprasath1,Madhusudan Meghna1,Sharma Arvind K.1,Poojary Jitesh1,Yaldiz Soner2,Harjani Ramesh1,Burns Steven M.2,Sapatnekar Sachin S.1

Affiliation:

1. University of Minnesota, Minneapolis, MN, USA

2. Intel Labs, Portland, OR, USA

Funder

DARPA

Publisher

ACM

Reference18 articles.

1. Balasa , F. , Maruvada , S. , and Krishnamoorthy , K . Using red-black interval trees in device-level analog placement with symmetry constraints . In Proc. ASP-DAC ( 2003 ). Balasa, F., Maruvada, S., and Krishnamoorthy, K. Using red-black interval trees in device-level analog placement with symmetry constraints. In Proc. ASP-DAC (2003).

2. lp_solve 5.5, Open source (mixed-integer) linear programming system;Berkelaar M.;Version 5.1.0,2004

3. KOAN/ANAGRAM II: New tools for device-level analog placement and routing;Cohn J.;JSSC,1991

4. ALIGN: A system for automating analog layout;Dhar T.;IEEE Des. Test,2020

5. Modeling and understanding of external latchup in CMOS technologies Part I: modeling latchup trigger current;Farbiz F.;IEEE T. Device Mater. Rel.,2011

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1. Reinforcement Learning or Simulated Annealing for Analog Placement? A Study based on Bounded-Sliceline Grids;Proceedings of the 2024 International Symposium on Physical Design;2024-03-12

2. Reinforcing the Connection between Analog Design and EDA (Invited Paper);2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22

3. The ALIGN Automated Analog Layout Engine;Proceedings of the 2023 International Symposium on Physical Design;2023-03-26

4. Hierarchical Analog and Mixed-Signal Circuit Placement Considering System Signal Flow;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022

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