Building Power Consumption Models from Executable Timed I/O Automata Specifications

Author:

Barbot Benoît1,Kwiatkowska Marta1,Mereacre Alexandru1,Paoletti Nicola1

Affiliation:

1. University of Oxford, Oxford, United Kingdom

Funder

ERC AdG VERIWARE (246967)

Institute for the Future of Computing Oxford Martin School

ERC PoC VERIPACE (620196)

Publisher

ACM

Reference30 articles.

1. Bang-bang control using temporal logic. http://tinyurl.com/ngp4epu. Bang-bang control using temporal logic. http://tinyurl.com/ngp4epu.

2. Code synthesis for timed automata;Amnell T.;Nord. J. Comput.,2002

3. On hardware-in-the-loop simulation

4. HASL: A new approach for performance evaluation and model checking from concepts to experimentation

5. Microcontroller Assembly Synthesis from Timed Automaton Task Specifications

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