Affiliation:
1. Huazhong University of Science and Technology
Abstract
The raw error rate of a Solid-State drive (SSD) increases gradually with the increase of Program/Erase (P/E) cycles, retention time, and read cycles. Traditional approaches often use Error Correction Code (ECC) to ensure the reliability of SSDs. For error-free flash memory pages, time costs spent on ECC are redundant and make read performance suboptimal. This article presents a CRC-Detect-First LDPC (CDF-LDPC) algorithm to optimize the read performance of SSDs. The basic idea is to bypass Low-Density Parity-Check (LDPC) decoding of error-free flash memory pages, which can be found using a Cyclic Redundancy Check (CRC) code. Thus, error-free pages can be read directly without sacrificing the reliability of SSDs. Experiment results show that the read performance is improved more than 50% compared with traditional approaches. In particular, when idle time of benchmarks and SSD parallelism are exploited, CDF-LDPC can be performed more efficiently. In this case, the read performance of SSDs can be improved up to about 80% compared to that of the state-of-art.
Publisher
Association for Computing Machinery (ACM)
Subject
Hardware and Architecture
Cited by
7 articles.
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2. Flash-Based Solid-State Storage Reduces LDPC Read Retry Scheme;Proceedings of the 7th International Conference on Computer Science and Application Engineering;2023-10-17
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4. Adaptive Differential Wearing for Read Performance Optimization on High-Density NAND Flash Memory;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023
5. DWR: Differential Wearing for Read Performance Optimization on High-Density NAND Flash Memory;2022 Design, Automation & Test in Europe Conference & Exhibition (DATE);2022-03-14