Affiliation:
1. Synopsys, Inc.
2. Massachusetts Institute of Technology
Abstract
DSP architectures typically provide indirect addressing modes with autoincrement and decrement. In addition, indexing mode is generally not available, and there are usually few, if any, general-purpose registers. Hence, it is necessary to use address registers and perform address arithmetic to access automatic variables. Subsuming the address arithmetic into autoincrement and decrement modes improves the size of the generated code. In this article we present a formulation of the problem of optimal storage assignment such that explicit instructions for address arithmetic are minimized. We prove that for the case of a single address register the decision problem is NP-complete, even for a single basic block. We then generalize the problem to multiple address registers. For both cases heuristic algorithms are given, and experimental results are presented.
Publisher
Association for Computing Machinery (ACM)
Reference16 articles.
1. AHO A. HOPCROFT J. AND ULLMAN J. 1974. The Design and Analysis of Computer Algorithms. Addison-Wesley Reading Mass. AHO A. HOPCROFT J. AND ULLMAN J. 1974. The Design and Analysis of Computer Algorithms. Addison-Wesley Reading Mass.
2. AHO A. SETHI R. AND ULLMAN J. 1986. Compilersiprinciples Techniques and Tools. Addison-Wesley Reading Mass. AHO A. SETHI R. AND ULLMAN J. 1986. Compilersiprinciples Techniques and Tools. Addison-Wesley Reading Mass.
3. Challenges in Code Generation for Embedded Processors
4. Optimizing stack frame accesses for processors with restricted addressing modes
Cited by
41 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献