Improving compute in-memory ECC reliability with successive correction

Author:

Crafton Brian1,Wan Zishen1,Spetalnick Samuel1,Yoon Jong-Hyeok2,Wu Wei3,Tokunaga Carlos3,De Vivek3,Raychowdhury Arijit1

Affiliation:

1. Georgia Institute of Technology

2. Daegu Gyeongbuk Institute of Science and Technology

3. Intel Labs

Funder

Multidisciplinary University Research Initiative

Publisher

ACM

Reference12 articles.

1. U. Gupta , " The architectural implications of facebook's dnn-based personalized recommendation," in 2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) , pp. 488 -- 501 , IEEE , 2020 . U. Gupta et al., "The architectural implications of facebook's dnn-based personalized recommendation," in 2020 IEEE International Symposium on High Performance Computer Architecture (HPCA), pp. 488--501, IEEE, 2020.

2. Efficient Processing of Deep Neural Networks: A Tutorial and Survey

3. Compute-in-Memory Chips for Deep Learning: Recent Trends and Prospects

4. J. Wu , " A 40nm low-power logic compatible phase change memory technology," in 2018 IEEE International Electron Devices Meeting (IEDM) , pp. 27 -- 26 , IEEE , 2018 . J. Wu et al., "A 40nm low-power logic compatible phase change memory technology," in 2018 IEEE International Electron Devices Meeting (IEDM), pp. 27--6, IEEE, 2018.

5. Y. Long of reliable dnn accelerator with un-reliable reram," in 2019 Design , Automation & Test in Europe Conference & Exhibition (DATE) , pp. 1769 -- 1774 , IEEE, 2019 . Y. Long et al., "Design of reliable dnn accelerator with un-reliable reram," in 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 1769--1774, IEEE, 2019.

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