A scalable symbolic simulation tool for low power embedded systems

Author:

Sethumurugan Subhash1,Hegde Shashank1,Cherupalli Hari2,Sartori John1

Affiliation:

1. University of Minnesota

2. Synopsys Inc.

Funder

NSF

Publisher

ACM

Reference30 articles.

1. Nathan Bleier , John Sartori , and Rakesh Kumar . 2021 . Property-driven Automatic Generation of Reduced-ISA Hardware. In 2021 58th ACM/IEEE Design Automation Conference (DAC). IEEE, 349--354 . Nathan Bleier, John Sartori, and Rakesh Kumar. 2021. Property-driven Automatic Generation of Reduced-ISA Hardware. In 2021 58th ACM/IEEE Design Automation Conference (DAC). IEEE, 349--354.

2. Jacob Borgeson . 2012. Ultra-low-power pioneers: TI slashes total MCU power by 50 percent with new "Wolverine" MCU platform. Texas Instruments White Paper ( 2012 ). http://www.ti.com/lit/wp/slay019a/slay019a.pdf Jacob Borgeson. 2012. Ultra-low-power pioneers: TI slashes total MCU power by 50 percent with new "Wolverine" MCU platform. Texas Instruments White Paper (2012). http://www.ti.com/lit/wp/slay019a/slay019a.pdf

3. Cadence. [n.d.]. Encounter User Guide. http://www.cadence.com/ Cadence. [n.d.]. Encounter User Guide. http://www.cadence.com/

4. Bespoke Processors for Applications with Ultra-low Area and Power Constraints

5. Determining Application-Specific Peak Power and Energy Requirements for Ultra-Low-Power Processors

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