Random Stimuli Generation for the Verification of Quantum Circuits

Author:

Burgholzer Lukas1,Kueng Richard1,Wille Robert2

Affiliation:

1. Johannes Kepler University Linz, Austria

2. Johannes Kepler University Linz, Austria and Software Competence Center Hagenberg GmbH (SCCH), Austria

Publisher

ACM

Reference37 articles.

1. SAT and ATPG: Boolean engines for formal hardware verification;Biere A.;Int'l Conf. on CAD,2002

2. Stimulus generation for constrained random simulation;Kitchen N.;Int'l Conf. on CAD,2007

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