Source-Level Compiler Optimizations for High-Level Synthesis-Reference-Cited by-同舟云学术

Source-Level Compiler Optimizations for High-Level Synthesis

Published:2016 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the SouthEast European Design Automation, Computer Engineering, Computer Networks and Social Media Conference on - SEEDA-CECNSM '16
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Author:

Dimitriou Georgios¹,Chatzianastasiou Georgios¹,Tsakyridis Apostolos¹,Stamoulis Georgios¹,Dossis Michael²

Affiliation:

1. Dept. of Electrical and Computer Engineering, University of Thessaly, Volos, Greece

2. Dept. of Inf. Engineering, TEI of W. Macedonia, Kastoria, Greece

Publisher

ACM Press

Reference19 articles.

1. Banerjee, K., Karfa, C., Sarkar, D., and Mandal, C. 2014. Verification of Code Motion Techniques Using Value Propagation. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 33, No. 8, pp. 1180--1193, August 2014.

2. Cardoso, J., Diniz, P., and Weinhardt, M. 2010. Compiling for Reconfigurable Computing: A Survey. In ACM Computing Surveys, Vol. 42, No. 4, June 2010.

3. Cong, J., Zhang, P., and Zou, Y. 2012. Optimizing Memory Hierarchy Allocation with Loop Transformations for High-Level Synthesis. In DAC 2012, San Francisco, California, USA, June 2012.

4. Dimitriou, G., and Dossis, M. 2015. Experimenting with a High-Level Synthesis System Front End. In PACET 2015, Ioannina, May 2015; also in Journal of Engineering Science and Technology Review, 2016.

5. Del Barrio, A. A., Hermida, R., Memik, S. O., Mendias, J. M., and Molina, M. C. 2012. Multispeculative Addition Applied to Datapath Synthesis. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 31, No. 12, pp. 1817--1830, December 2012.

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