Author:
Zhao Min,Sapatnekar Sachin S.
Cited by
3 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. 1+1 <2: Efficient Automatic Standard Cell Sharing Between Digital VLSI Designs for Area Saving;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11
2. Design Constraint Based Attacks;Split Manufacturing of Integrated Circuits for Hardware Security and Trust;2021
3. Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits;Vlsi-Soc: From Systems To Silicon