Beyond the PDP-11

Author:

Chisnall David1,Rothwell Colin1,Watson Robert N.M.1,Woodruff Jonathan1,Vadera Munraj1,Moore Simon W.1,Roe Michael1,Davis Brooks2,Neumann Peter G.2

Affiliation:

1. University of Cambridge, Cambridge, United Kingdom

2. SRI International, Menlo Park, USA

Abstract

We propose a new memory-safe interpretation of the C abstract machine that provides stronger protection to benefit security and debugging. Despite ambiguities in the specification intended to provide implementation flexibility, contemporary implementations of C have converged on a memory model similar to the PDP-11, the original target for C. This model lacks support for memory safety despite well-documented impacts on security and reliability. Attempts to change this model are often hampered by assumptions embedded in a large body of existing C code, dating back to the memory model exposed by the original C compiler for the PDP-11. Our experience with attempting to implement a memory-safe variant of C on the CHERI experimental microprocessor led us to identify a number of problematic idioms. We describe these as well as their interaction with existing memory safety schemes and the assumptions that they make beyond the requirements of the C specification. Finally, we refine the CHERI ISA and abstract model for C, by combining elements of the CHERI capability model and fat pointers, and present a softcore CPU that implements a C abstract machine that can run legacy C code with strong memory protection guarantees.

Funder

Defense Advanced Research Projects Agency

Publisher

Association for Computing Machinery (ACM)

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