Harnessing voltage margins for energy efficiency in multicore CPUs-Reference-Cited by-同舟云学术

Harnessing voltage margins for energy efficiency in multicore CPUs

Published:2017-10-14 Issue: Volume: Page:
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Container-title:Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture
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Author:

Papadimitriou George¹,Kaliorakis Manolis¹,Chatzidimitriou Athanasios¹,Gizopoulos Dimitris¹,Lawthers Peter²,Das Shidhartha³

Affiliation:

1. University of Athens, Greece

2. Applied Micro Circuits Corporation Deutschland GmbH, Munich, Germany

3. ARM Ltd., Cambridge, UK

Funder

European Union

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3123939.3124537

Reference45 articles.

1. Threshold-voltage sensitivity of ion-implanted m.o.s. transistors due to process variations

2. Comparison of Split-Versus Connected-Core Supplies in the POWER6 Microprocessor

3. Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-Guided Thread Scheduling

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