Affiliation:
1. North Carolina State University, Raleigh, NC
2. University of Illinois at Urbana-Champaign, Urbana-Champaign, IL
3. University of Washington, Seattle, WA
Abstract
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficiently and with low complexity with hardware signatures.
To enable flexible use of signatures, this paper proposes to expose a Signature Register File to the software through a rich ISA. The software has great flexibility to decide, for each signature,which addresses to collect and which addresses to disambiguate against. We call this architecture
SoftSig
. In addition, as an example of SoftSig use, we show how to detect redundant function calls efficiently and eliminate them dynamically. We call this algorithm
MemoiSE
. On average for five popular applications, MemoiSE reduces the number of dynamic instructions by 9.3%, thereby reducing the execution time of the applications by 9%.
Publisher
Association for Computing Machinery (ACM)
Subject
Computer Graphics and Computer-Aided Design,Software
Cited by
11 articles.
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1. Fast, Transparent, and High-Fidelity Memoization Cache-Keys for Computational Workflows;2022 IEEE International Conference on Services Computing (SCC);2022-07
2. Leveraging Hardware Caches for Memoization;IEEE Computer Architecture Letters;2018-01-01
3. Asymmetric Allocation in a Shared Flexible Signature Module for Multicore Processors;The Computer Journal;2016-03-17
4. A Hardware Approach to Detect, Expose and Tolerate High Level Data Races;2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP);2016-02
5. Intercepting Functions for Memoization;ACM Transactions on Architecture and Code Optimization;2015-07-08