dRMT

Author:

Chole Sharad1,Fingerhut Andy1,Ma Sha1,Sivaraman Anirudh2,Vargaftik Shay3,Berger Alon3,Mendelson Gal3,Alizadeh Mohammad2,Chuang Shang-Tse1,Keslassy Isaac4,Orda Ariel3,Edsall Tom1

Affiliation:

1. Cisco Systems, Inc.

2. MIT

3. Technion

4. Technion and VMware, Inc.

Funder

Hasso Plattner Institute Research School

National Science Foundation

Cisco Research Center

Ministry of Science and Technology, Israel

Shillman Fund for Global Security

Gordon Fund for Systems Engineering

Technion Fund for Security Research

Israeli Consortium for Network Programming

Publisher

ACM

Reference25 articles.

1. A Deeper Dive Into Barefoot Networks Technology. http://techfieldday.com/appearance/barefoot-networks-presents-at-networking-field-day-14. A Deeper Dive Into Barefoot Networks Technology. http://techfieldday.com/appearance/barefoot-networks-presents-at-networking-field-day-14.

2. Barefoot: The World's Fastest and Most Programmable Networks. https://barefootnetworks.com/media/white_papers/Barefoot-Worlds-Fastest-Most-Programmable-Networks.pdf. Barefoot: The World's Fastest and Most Programmable Networks. https://barefootnetworks.com/media/white_papers/Barefoot-Worlds-Fastest-Most-Programmable-Networks.pdf.

3. Cavium Attacks Broadcom in Switches. http://www.eetimes.com/document.asp?doc_id=1323931. Cavium Attacks Broadcom in Switches. http://www.eetimes.com/document.asp?doc_id=1323931.

4. Cisco QuantumFlow Processor. https://newsroom.cisco.com/feature-content?type=webcontent&articleId=4237516. Cisco QuantumFlow Processor. https://newsroom.cisco.com/feature-content?type=webcontent&articleId=4237516.

5. dRMT project. http://drmt.technion.ac.il. dRMT project. http://drmt.technion.ac.il.

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1. P4runpro: Enabling Runtime Programmability for RMT Programmable Switches;Proceedings of the ACM SIGCOMM 2024 Conference;2024-08-04

2. OptimusPrime: Unleash Dataplane Programmability through a Transformable Architecture;Proceedings of the ACM SIGCOMM 2024 Conference;2024-08-04

3. Hermes: Low-Overhead Inter-Switch Coordination in Network-Wide Data Plane Program Deployment;IEEE/ACM Transactions on Networking;2024-08

4. SLICE Matrix: A Memory Access Scheduling Policy for Multicore Network Processors;2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP);2024-07-24

5. Efficient Flow Table Caching Architecture and Replacement Policy for SDN Switches;Journal of Network and Systems Management;2024-06-18

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