Weaving Synchronous Reactions into the Fabric of SSA-form Compilers
-
Published:2022-03-08
Issue:2
Volume:19
Page:1-25
-
ISSN:1544-3566
-
Container-title:ACM Transactions on Architecture and Code Optimization
-
language:en
-
Short-container-title:ACM Trans. Archit. Code Optim.
Author:
Pompougnac Hugo1,
Beaugnon Ulysse2,
Cohen Albert2,
Butucaru Dumitru Potop1
Affiliation:
1. Inria, France
2. Google, France
Abstract
We investigate the programming of reactive systems combining closed-loop control with performance-intensive components such as Machine Learning (ML). Reactive control systems are often safety-critical and associated with real-time execution requirements, a domain of predilection for synchronous programming languages. Extending the high levels of assurance found in reactive control systems to computationally intensive code remains an open issue. We tackle it by unifying concepts and algorithms from synchronous languages with abstractions commonly found in general-purpose and ML compilers. This unification across embedded and high-performance computing enables a high degree of reuse of compiler abstractions and code. We first recall commonalities between dataflow synchronous languages and the static single assignment (SSA) form of general-purpose/ML compilers. We highlight the key mechanisms of synchronous languages that SSA does not cover—denotational concepts such as synchronizing computations with an external time base, cyclic and reactive I/O, as well as the operational notions of relaxing control flow dominance and the modeling of absent values. We discover that initialization-related static analyses and code generation aspects can be fully decoupled from other aspects of synchronous semantics such as memory management and causality analysis, the latter being covered by existing dominance-based algorithms of SSA-form compilers. We show how the SSA form can be seamlessly extended to enable all SSA-based transformations and optimizations on reactive programs with synchronous concurrency. We derive a compilation flow suitable for both high-performance and reactive aspects of a control application, by embedding the Lustre dataflow synchronous language into the SSA-based MLIR/LLVM compiler infrastructure. This allows the modeling of signal processing and deep neural network inference in the (closed) loop of feedback-directed control systems. With only minor efforts leveraging the MLIR infrastructure, the generated code matches or outperforms state-of-the-art synchronous language compilers on computationally intensive ML applications.
Publisher
Association for Computing Machinery (ACM)
Subject
Hardware and Architecture,Information Systems,Software
Reference22 articles.
1. ARINC. 2010. ARINC 653: Avionics Application Software Standard Interface. Part 1—Required Services. Revision 3.
2. The synchronous languages 12 years later
3. J. L. Bergerand, P. Caspi, D. Pilaud, N. Halbwachs, and E. Pilaud. 1985. Outline of a real time data flow language. In Proceedings of the RTSS.
4. Clock-directed modular code generation for synchronous data-flow languages
5. Uday Bondhugula. 2020. High Performance Code Generation in MLIR: An Early Case Study with GEMM. Retrieved from https://arXiv:2003.00532.
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. System Design of Sports Video Based on Improved SSA-LSSVM Model;Lecture Notes on Data Engineering and Communications Technologies;2024