The semantics of power and ARM multiprocessor machine code (abstract only)
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Published:2009-05-06
Issue:5
Volume:44
Page:8-8
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ISSN:0362-1340
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Container-title:ACM SIGPLAN Notices
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language:en
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Short-container-title:SIGPLAN Not.
Author:
Alglave Jade,Fox Anthony,Ishtiaq Samin,Myreen Magnus O.,Sarkar Susmit,Sewell Peter,Nardelli Francesco Zappa
Abstract
We develop a rigorous semantics for Power and ARM multiprocessor programs, including their relaxed memory model and the behaviour of reasonable fragments of their instruction sets. The semantics is mechanised in the HOL proof assistant. This should provide a good basis for informal reasoning and formal verification of low-level code for these weakly consistent architectures, and, together with our x86 semantics, for the design and compilation of high-level concurrent languages.
Publisher
Association for Computing Machinery (ACM)
Subject
Computer Graphics and Computer-Aided Design,Software
Cited by
1 articles.
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