Author:
Chou Hsinwei,Wang Yu-Hao,Chen Charlie Chung-Ping
Cited by
8 articles.
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1. DAGSizer: A Directed Graph Convolutional Network Approach to Discrete Gate Sizing of VLSI Graphs;ACM Transactions on Design Automation of Electronic Systems;2022-12-16
2. Limiting Interconnect Heating in Power-Driven Physical Synthesis;Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding;2022-11-03
3. GRA-LPO;Proceedings of the 26th Asia and South Pacific Design Automation Conference;2021-01-18
4. Logic Synthesis;Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology;2016-04-14
5. OSFA;Proceedings of the 52nd Annual Design Automation Conference;2015-06-07