Survey on Combinatorial Register Allocation and Instruction Scheduling

Author:

Lozano Roberto Castañeda1ORCID,Schulte Christian2ORCID

Affiliation:

1. RISE SICS, Sweden and KTH Royal Institute of Technology, Kista, Sweden

2. KTH Royal Institute of Technology, Sweden and RISE SICS, Kista, Sweden

Abstract

Register allocation (mapping variables to processor registers or memory) and instruction scheduling (reordering instructions to increase instruction-level parallelism) are essential tasks for generating efficient assembly code in a compiler. In the past three decades, combinatorial optimization has emerged as an alternative to traditional, heuristic algorithms for these two tasks. Combinatorial optimization approaches can deliver optimal solutions according to a model, can precisely capture trade-offs between conflicting decisions, and are more flexible at the expense of increased compilation time. This article provides an exhaustive literature review and a classification of combinatorial optimization approaches to register allocation and instruction scheduling, with a focus on the techniques that are most applied in this context: integer programming, constraint programming, partitioned Boolean quadratic programming, and enumeration. Researchers in compilers and combinatorial optimization can benefit from identifying developments, trends, and challenges in the area; compiler practitioners may discern opportunities and grasp the potential benefit of applying combinatorial optimization.

Funder

Ericsson AB and the Swedish Research Council

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science,Theoretical Computer Science

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