Security Vulnerability in Processor-Interconnect Router Design-Reference-Cited by-同舟云学术

Security Vulnerability in Processor-Interconnect Router Design

Published:2014-11-03 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2014 ACM SIGSAC Conference on Computer and Communications Security
language:
Short-container-title:

Author:

Song WonJun¹,Kim John¹,Lee Jae-Wook²,Abts Dennis³

Affiliation:

1. Korea Advanced Institute of Science and Technology, Daejeon, South Korea

2. SungKyunKwan University, Suwon, South Korea

3. Google Inc., Madison, USA

Funder

Ministry of Science, ICT and Future Planning

IT R&D program of MSIP/IITP

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/2660267.2660290

Reference38 articles.

1. Tile Processor User Architecture Manual. http://www.tilera.com/scm/docs/UG101-User-Architecture-Reference.pdf. Tile Processor User Architecture Manual. http://www.tilera.com/scm/docs/UG101-User-Architecture-Reference.pdf.

2. TILE64 - Processor: A 64-Core SoC with Mesh Interconnect

3. SeaStar Interconnect: Balanced Bandwidth for Scalable Performance

4. BIOS chronomancy

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Case for Software-Based Adaptive Routing in NUMA Systems;2019 IEEE 37th International Conference on Computer Design (ICCD);2019-11

2. A Benchmark Suite of Hardware Trojans for On-Chip Networks;IEEE Access;2019

3. Co-processor-based Behavior Monitoring;Proceedings of the 33rd Annual Computer Security Applications Conference;2017-12-04

4. History-Based Arbitration for Fairness in Processor-Interconnect of NUMA Servers;ACM SIGOPS Operating Systems Review;2017-04-04

5. A survey of microarchitectural timing attacks and countermeasures on contemporary hardware;Journal of Cryptographic Engineering;2016-12-26