Design and implementation of nonvolatile power-gating SRAM using SOTB technology
Author:
Affiliation:
1. Imaging Science and Engineering Laboratory, Tokyo Institute of Technology, Japan, Nagatsuta, Midori-ku, Yokohama, Kanagawa
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2934583.2934628
Reference17 articles.
1. 1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS
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3. Comparative study of power-gating architectures for nonvolatile FinFET-SRAM using spintronics-based retention technology. In 18th Design, Automation and Test in Europe (DATE15) (Grenoble;Shuto Y.;France, March,2015
4. Nonvolatile delay flip-flop using spin-transistor architecture with spin transfer torque MTJs for power-gating systems
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