Affiliation:
1. TU Braunschweig, Germany
2. Huawei, Germany
Abstract
We propose a family of logical theories for capturing an abstract notion of consistency and show how to build a generic and efficient theory solver that works for all members in the family.
The theories can be used to model the influence of memory consistency models on the semantics of concurrent programs.
They are general enough to precisely capture important examples like TSO, POWER, ARMv8, RISC-V, RC11, IMM, and the Linux kernel memory model.
To evaluate the expressiveness of our theories and the performance of our solver, we integrate them into a lazy SMT scheme that we use as a backend for a bounded model checking tool.
An evaluation against related verification tools shows, besides flexibility, promising performance on challenging programs under complex memory models.
Publisher
Association for Computing Machinery (ACM)
Subject
Safety, Risk, Reliability and Quality,Software
Reference94 articles.
1. Stateless Model Checking for TSO and PSO
2. Optimal dynamic partial order reduction
3. Stateless Model Checking for POWER
4. Optimal stateless model checking under the release-acquire semantics
5. Serge Abiteboul , Richard Hull , and Victor Vianu . 1995. Foundations of Databases: The Logical Level . Addison-Wesley Longman Publishing Co., Inc. . https://doi.org/10.5555/551350 10.5555/551350 Serge Abiteboul, Richard Hull, and Victor Vianu. 1995. Foundations of Databases: The Logical Level. Addison-Wesley Longman Publishing Co., Inc.. https://doi.org/10.5555/551350
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