Dimensionality-Aware Redundant SIMT Instruction Elimination
Author:
Affiliation:
1. Purdue University, West Lafayette, IN, USA
Funder
JUMP Center co-sponsored by SRC and DARPA
Applications Driving Architectures (ADA) Research Center
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3373376.3378520
Reference52 articles.
1. Tor M. Aamodt. textscGPGPU-Sim 3.x Manual . http://gpgpu-sim.org/manual/index.php5/GPGPU-Sim_3.x_Manual 2012. (accessed March 30 2017). Tor M. Aamodt. textscGPGPU-Sim 3.x Manual . http://gpgpu-sim.org/manual/index.php5/GPGPU-Sim_3.x_Manual 2012. (accessed March 30 2017).
2. Dynamic dead-instruction detection and elimination
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