FABulous: An Embedded FPGA Framework-Reference-Cited by-同舟云学术

FABulous: An Embedded FPGA Framework

Published:2021-02-17 Issue: Volume: Page:
ISSN:
Container-title:The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
language:
Short-container-title:

Author:

Koch Dirk¹,Dao Nguyen¹,Healy Bea¹,Yu Jing¹,Attwood Andrew²

Affiliation:

1. The University of Manchester, Manchester, United Kingdom

2. Liverpool John Moores University, Liverpool, United Kingdom

Funder

Engineering and Physical Sciences Research Council

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3431920.3439302

Reference71 articles.

1. C. Wolf "Yosys Open SYnthesis Suite " http://www.clifford.at/yosys/. C. Wolf "Yosys Open SYnthesis Suite " http://www.clifford.at/yosys/.

2. Berkeley Logic Synthesis and Verification Group "ABC: A System for Sequential Synthesis and Verification " http://www.eecs.berkeley.edu/alanmi/abc/. Berkeley Logic Synthesis and Verification Group "ABC: A System for Sequential Synthesis and Verification " http://www.eecs.berkeley.edu/alanmi/abc/.

3. D. Shah E. Hung C. Wolf S. Bazanski D. Gisselquist and M. Milanovic "Yosys D. Shah E. Hung C. Wolf S. Bazanski D. Gisselquist and M. Milanovic "Yosys

Cited by 26 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Implementation and Analysis on FIFO using FPGA;2024 2nd International Conference on Sustainable Computing and Smart Systems (ICSCSS);2024-07-10

2. Investigating resource-efficient neutron/gamma classification ML models targeting eFPGAs;Journal of Instrumentation;2024-07-01

3. From Full-Custom to Gate-Array ASIC for Hardware IP Protection;2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS);2024-04-19

4. From Topology to Realization in FPGA/VPR Routing;Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays;2024-04

5. Semi-custom EDA;FPGA EDA;2024