TAM: A Front-End to an Auto-Parallelizing Compiler

Author:

Sharma Ashish,Badjatiya Mayank,Sahay Aayush,Verma Aryan,Agarwal Ayush1,Singal Gaurav2,Garg Deepak3,Jain Deepak Kumar4,Kotecha Ketan5

Affiliation:

1. Indian Institute of Information Technology Kota, India

2. Department of CSE, Netaji Subhas University of Technology, India

3. School of Computer Engineering and Technology, Bennett University, India

4. Key Laboratory of Air Ground Cooperative control for universities in Chongqing, College of Automation, Chongqing University of Posts and Telecommunications, China

5. Symbiosis Centre for Applied AI, Symbiosis International, India

Abstract

The multi-core architecture has revolutionized the parallel computing. Despite this, the modern age compilers have a long way to achieve auto-parallelization. Through this paper, we introduce a language that encouraging the auto-parallelization. We are also introducing Front-End for our auto-parallelizing compiler. Later, we examined our compiler employing a different number of core and verify results based on different metrics based on total compilation time, memory utilization, power utilization and CPU utilization. At last, we learned that parallelizing multiple files engage more CPU resources, memory and energy, but it finishes the task at hand in less time. In this paper, we have proposed a loop code generation technique that makes the generation of nested loop IR code faster by dividing the blocks into some extra code blocks using a modular approach. Our TAM compiler technique speedup by 7.506, 5.283 and 2.509 against sequential compilation when we utilized 8, 4 and 2 cores respectively. We observed that the CPU utilization of the TAM compiler reaches the maximum permissible limit when an optimal parallelizable instance is compiled.

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science

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