Affiliation:
1. ETH Zurich, Zürich, Switzerland
2. Technion, Haifa, Israel
3. MIT and Tel-Aviv University, MA, USA
Abstract
Lock-free concurrent algorithms guarantee that some concurrent operation will always make progress in a finite number of steps. Yet programmers prefer to treat concurrent code as if it were wait-free, guaranteeing that all operations always make progress. Unfortunately, designing wait-free algorithms is generally a very complex task, and the resulting algorithms are not always efficient. Although obtaining efficient wait-free algorithms has been a long-time goal for the theory community, most nonblocking commercial code is only lock-free.
This article suggests a simple solution to this problem. We show that for a large class of lock-free algorithms, under scheduling conditions that approximate those found in commercial hardware architectures, lock-free algorithms behave as if they are wait-free. In other words, programmers can continue to design simple lock-free algorithms instead of complex wait-free ones, and in practice, they will get wait-free progress.
Our main contribution is a new way of analyzing a general class of lock-free algorithms under a stochastic scheduler. Our analysis relates the individual performance of processes to the global performance of the system using Markov chain lifting between a complex per-process chain and a simpler system progress chain. We show that lock-free algorithms are not only wait-free with probability 1 but that in fact a general subset of lock-free algorithms can be closely bounded in terms of the average number of steps required until an operation completes.
To the best of our knowledge, this is the first attempt to analyze progress conditions, typically stated in relation to a worst-case adversary, in a stochastic model capturing their expected asymptotic behavior.
Funder
ISF
NSF
Oracle and Intel corporations
U.S. Department of Energy
SNF Postdoctoral Fellows Program
DoE ASCR
equipment grants from Intel Corporation
Publisher
Association for Computing Machinery (ACM)
Subject
Artificial Intelligence,Hardware and Architecture,Information Systems,Control and Systems Engineering,Software
Cited by
5 articles.
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2. WRLqueue: A Lock-Free Queue For Embedded Real-Time System;2022 IEEE 24th Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, Cloud & Big Data Systems & Application (HPCC/DSS/SmartCity/DependSys);2022-12
3. Design-space evaluation for non-blocking synchronization in Ada: lock elision of protected objects, concurrent objects, and low-level atomics;Journal of Systems Architecture;2020-11
4. Unfair Scheduling Patterns in NUMA Architectures;2019 28th International Conference on Parallel Architectures and Compilation Techniques (PACT);2019-09
5. Analyzing Contention and Backoff in Asynchronous Shared Memory;Proceedings of the ACM Symposium on Principles of Distributed Computing;2017-07-25