A 64-bit stream processor architecture for scientific applications

Author:

Yang Xuejun,Yan Xiaobo,Xing Zuocheng,Deng Yu,Jiang Jiang,Zhang Ying

Publisher

ACM Press

Cited by 18 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Extension VM: Interleaved Data Layout in Vector Memory;ACM Transactions on Architecture and Code Optimization;2023-11-07

2. MLPs: Efficient Training of MiniGo on Large-scale Heterogeneous Computing System;2022 IEEE 28th International Conference on Parallel and Distributed Systems (ICPADS);2023-01

3. Advancing DSP into HPC, AI, and beyond: challenges, mechanisms, and future directions;CCF Transactions on High Performance Computing;2021-03

4. Space‐address decoupled scratchpad memory management for neural network accelerators;Concurrency and Computation: Practice and Experience;2020-10-13

5. Iteration Interleaving--Based SIMD Lane Partition;ACM Transactions on Architecture and Code Optimization;2016-01-07

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