SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration-Reference-Cited by-同舟云学术

SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration

Published:2024-04 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays
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Author:

Zhuang Jinming¹^ORCID,Yang Zhuoping¹^ORCID,Ji Shixin¹^ORCID,Huang Heng²^ORCID,Jones Alex K.¹^ORCID,Hu Jingtong¹^ORCID,Shi Yiyu³^ORCID,Zhou Peipei¹^ORCID

Affiliation:

1. University of Pittsburgh, Pittsburgh, USA

2. University of Maryland, College Park, USA

3. University of Notre Dame, Notre Dame, USA

Funder

NSF (National Science Foundation)

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3626202.3637569

Reference49 articles.

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3. Minjia Zhang, Samyam Rajbandari,WenhanWang, Elton Zheng, Olatunji Ruwase, Jeff Rasley, Jason Li, JunhuaWang, and Yuxiong He. Accelerating large scale deep learning inference through {DeepCPU} at microsoft. In 2019 USENIX Conference on Operational Machine Learning (OpML 19), pages 5--7, 2019.

4. AMD/Xilinx. Versal: The First Adaptive Compute Acceleration Platform (ACAP)(WP505).

5. A reconfigurable fabric for accelerating large-scale datacenter services

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