Automatically accelerating non-numerical programs by architecture-compiler co-design-Reference-Cited by-同舟云学术

Automatically accelerating non-numerical programs by architecture-compiler co-design

Published:2017-11-27 Issue:12 Volume:60 Page:88-97
ISSN:0001-0782
Container-title:Communications of the ACM
language:en
Short-container-title:Commun. ACM

Author:

Campanoni Simone¹,Brownell Kevin²,Kanev Svilen²,Jones Timothy M.³,Wei Gu-Yeon²,Brooks David²

Affiliation:

1. Northwestern University, Evanston, IL

2. Harvard University, Cambridge, MA

3. University of Cambridge, England

Abstract

Because of the high cost of communication between processors, compilers that parallelize loops automatically have been forced to skip a large class of loops that are both critical to performance and rich in latent parallelism. HELIX-RC is a compiler/microprocessor co-design that opens those loops to parallelization by decoupling communication from thread execution in conventional multicore architecures. Simulations of HELIX-RC, applied to a processor with 16 Intel Atom-like cores, show an average of 6.85× performance speedup for six SPEC CINT2000 benchmarks.

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science

Link

https://dl.acm.org/doi/pdf/10.1145/3139461

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