An abstract interpretation for SPMD divergence on reducible control flow graphs

Author:

Rosemann Julian1,Moll Simon2,Hack Sebastian1

Affiliation:

1. Saarland University, Germany

2. NEC, Germany

Abstract

Vectorizing compilers employ divergence analysis to detect at which program point a specific variable is uniform, i.e. has the same value on all SPMD threads that execute this program point. They exploit uniformity to retain branching to counter branch divergence and defer computations to scalar processor units. Divergence is a hyper-property and is closely related to non-interference and binding time. There exist several divergence, binding time, and non-interference analyses already but they either sacrifice precision or make significant restrictions to the syntactical structure of the program in order to achieve soundness. In this paper, we present the first abstract interpretation for uniformity that is general enough to be applicable to reducible CFGs and, at the same time, more precise than other analyses that achieve at least the same generality. Our analysis comes with a correctness proof that is to a large part mechanized in Coq. Our experimental evaluation shows that the compile time and the precision of our analysis is on par with LLVM's default divergence analysis that is only sound on more restricted CFGs. At the same time, our analysis is faster and achieves better precision than a state-of-the-art non-interference analysis that is sound and at least as general as our analysis.

Publisher

Association for Computing Machinery (ACM)

Subject

Safety, Risk, Reliability and Quality,Software

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Enhancing Performance Through Control-Flow Unmerging and Loop Unrolling on GPUs;2024 IEEE/ACM International Symposium on Code Generation and Optimization (CGO);2024-03-02

2. Implementation Techniques for SPMD Kernels on CPUs;International Workshop on OpenCL;2023-04-18

3. Compiler-aided nd-range parallel-for implementations on CPU in hipSYCL;International Workshop on OpenCL;2022-05-10

4. DARM: Control-Flow Melding for SIMT Thread Divergence Reduction;2022 IEEE/ACM International Symposium on Code Generation and Optimization (CGO);2022-04-02

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