ALIGN

Author:

Kunal Kishor1,Madhusudan Meghna1,Sharma Arvind K.1,Xu Wenbin2,Burns Steven M.3,Harjani Ramesh1,Hu Jiang2,Kirkpatrick Desmond A.4,Sapatnekar Sachin S.1

Affiliation:

1. University of Minnesota, Minneapolis, MN

2. Texas A&M University College Station, TX

3. Intel Corporation Hillsboro, OR

4. Intel Corporation, Hillsboro, OR

Publisher

ACM

Cited by 63 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Opportunities and challenges of graph neural networks in electrical engineering;Nature Reviews Electrical Engineering;2024-08-05

2. Graph Attention-Based Symmetry Constraint Extraction for Analog Circuits;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-08

3. ARYABHAT: A Digital-Like Field Programmable Analog Computing Array for Edge AI;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-05

4. AMBEATion: Analog Mixed-Signal Back-End Design Automation with Machine Learning and Artificial Intelligence Techniques;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25

5. Post-layout simulation driven analog circuit sizing;Science China Information Sciences;2024-03-20

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