No Compromises

Author:

Yang Fan1,Lu Youyou1,Chen Youmin1,Mao Haiyu1,Shu Jiwu1

Affiliation:

1. Department of Computer Science and Technology, Tsinghua University, Beijing, China, Beijing National Research Center for Information Science and Technology (BNRist)

Funder

Research and Development Plan in Key field of Guangdong Province

National Key Research & Development Program of China

the National Natural Science Foundation of China

Huawei Innovation Research Program

Publisher

ACM

Reference25 articles.

1. 2015. 3D XPoint. "https://newsroom.intel.com/news-releases/intel-and-micron-produce-breakthrough-memory-technology/". 2015. 3D XPoint. "https://newsroom.intel.com/news-releases/intel-and-micron-produce-breakthrough-memory-technology/".

2. Nathan Binkert etal 2011. The Gem5 Simulator. SIGARCH Comput. Archit. News (2011). 10.1145/2024716.2024718 Nathan Binkert et al. 2011. The Gem5 Simulator. SIGARCH Comput. Archit. News (2011). 10.1145/2024716.2024718

3. B. Gassend etal 2003. Caches and hash trees for efficient memory integrity verification. In HPCA-9. IEEE. B. Gassend et al. 2003. Caches and hash trees for efficient memory integrity verification. In HPCA-9. IEEE.

4. H. Mao etal 2017. Protect non-volatile memory from wear-out attack based on timing difference of row buffer hit/miss. In DATE. H. Mao et al. 2017. Protect non-volatile memory from wear-out attack based on timing difference of row buffer hit/miss. In DATE.

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